KATHMANDU, July 5: On July 2, Institute of Engineering (IOE) Pulchowk hosted the ‘First National FPGA Design Contest’, an event jointly organized by IOE Pulchowk Campus, Himalaya College of Engineering, Kathmandu Engineering College, Kathford International College of Engineering and Management, and Digitronix Nepal.
With the aim to promote the Field Programmable Gate Array technology, a kind of silicon chip circuitry used in multiple hardware design application in sectors like aerospace engineering to mobile phone communications, the event saw an enthusiastic participation of students from various engineering institutes based in Kathmandu.
The team of Samundra Kumar Thapa and Prasiddha Siwakoti from Himalaya College of Engineering won the first prize of Rs 15,000 for their project ‘optimize ALU and MAC processor’. Thapathali Engineering Campus’ Ashutosh Karna, Kalpana Bhandari and Sushma Pokharel were declared the first runner up winning Rs 7000, while Safal Raj Pandey, Suvash Vishwokarma, Sabin Thapa and Ankit Dawadi from Kathmandu Engineering College secured the position of second runner up winning Rs 4000.
World’s leading universities like Oxford and Harvard have large scale research projects dedicated to the development of FPGA. Addressing its prospects in Nepal, Xilinix FPGA engineer Deepesh Man Shakya said, “The event is a milestone for FPGA education in Nepal and will act as a platform to create FPGA based research and development centre.”
“We are overwhelmed by the interest shown by colleges about FPGA,” said Digtronix Nepal’s Krishna Gaire, co-ordinator of the event. Digitronix Nepal will also provide FPGA development training and internship opportunities to all the winners.
2nd All Nepal FPGA Design Competition 2017 concludes
